Minutes

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AGENDA PPT | PDF :

Wednesday - March 9
(VSIPL FORUM & DEVELOPMENT & DEMO WORKING GROUPS)
09:00-09:30 BREAKFAST
09:30-10:00 HPEC-SI Overview (Kepner MIT-LL) PPT | PDF
10:00-11:00 Demo/eval status (Cook, Judd, Sroka, Emeny)PPT | PDF
11:00-12:00 VSIPL++ Implementation
-VSIPL++ implementation status (Bergmann/ CODESOURCERY)PDF
-Parallel VSIPL++ implementation status (Bergmann CODESOURCERY)
-Parallel VSIPL++ support functions specification (Bergmann CODESOURCERY)PDF
-Status of VSIPL++ compilation (Leimbach VERARI)
-Parallel VSIPL++ cluster status (Campbell (GTRI) PPT | PDF
-User's guide goals and outline (Campbell GTRI)
-VSIPL++ code copyright status (Campbell GTRI)
-VSIPL++ for a Smart Compiler (Litvinov, Szilagyi, Lethin(Reservoir)PPT | PDF

12:00-01:00 LUNCH
01:00-02:30 Serial VSIPL++ Specification discussion (Lebak MIT-LL)
02:30-03:00 VSIPL++ v1.0 vote PDF
03:00-03:30 BREAK
03:30-05:00 Parallel VSIPL++ and PCA
- Recap/Goals (Kepner MIT-LL)
- VSIPL++ Spec Analysis (Lethin RESERVOIR)
- Mapping VSIPL calls to PCA (Harrod SGI)
- Alternate approaches (Campbell GTRI) PPT | PDF
- R-Stream compiler mapping (Lebak MIT-LL)
- ||VSIPL++ Maps and PCA (Bergmann CODESOURCERY)

Thursday - March 10
(APPLIED RESEARCH WORKING GROUP)
09:00-09:30 BREAKFAST
09:30-10:30 FPGA IO API Status and Discussion (Vai/Leeser) PPT | PDF

10:30-11:00 Sensor processing benchmark application (Kepner MIT-LL)
11:00-12:00 Additional discussion of Wednesday items.
12:00-01:00 LUNCH

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LOCATION: MIT Lincoln Laboratory, Lexington, MA
Room S2-336
For directions see
http://www.ll.mit.edu/about/visitor.html

ORGANIZERS:

HPEC-SI Development Working Group Co-Chairs
Mark Richards (mark.richards@gtri.gatech.edu)
James Lebak (jlebak@ll.mit.edu)

HPEC-SI Prototypes Working Group Co-Chairs
Bob Bond (rbond@ll.mit.edu)
Ken Flowers (kflowers@mc.com)

HPEC-SI Advisory Board
Jeremy Kepner (kepner@ll.mit.edu)

ATTENDANCE:
Attendance is open to all U.S. Citizens.
If you plan on attending (in person or telecon) please send e-mail to:
kepner@ll.mit.edu