High Performance Embedded Computing
Software Initiative (HPEC-SI)

HPEC-SI colleagues,
Our next HPEC-SI meeting will be Apr 5/6 at MIT Lincoln Laboratory. Below is a draft agenda. If I am missing something please let me know. If you see your name listed and can't present please let me know. If you are planning on attending please RSVP to ssacco@ll.mit.edu.

Regards. -Jeremy

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HPEC-SI colleagues,
I would like to schedule our next HPEC-SI meeting for
Apr 5/6 at MIT Lincoln Laboratory. The main goals of the
meeting will be:

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(1) Parallel VSIPL++ Specification v1.0 Vote
(2) VSIPL image processing status
(3) Review of parallel code examples from User's Guide
(4) VSIPL API v1.2 Vote

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MINUTES


Agenda

Wednesday, Apr 5
(DEMONSTRATION & DEVELOPMENT WORKING GROUPS)
09:00-09:30 BREAKFAST
09:30-10:00 HPEC-SI Review & HPEC Preview (Kepner)
10:00-11:00 Demo/eval status (Pancoast, Judd, Sroka, Emeny)
11:00-12:00 VSIPL++ Serial and Parallel Implementation
-VSIPL++ implementation status (Bergmann CODESOURCERY)PDF
-Parallel VSIPL++ implementation status PDF
(Bergmann CODESOURCERY)
-Parallel VSIPL++ cluster status (Campbell GTRI)PDF|PPT
-VSIPL++ user's guide status (Campbell GTRI)
-Review of any Parallel submissions
-Discussion of VSIPL implementation
of HPCS SAR Benchmark (Sroka MITRE)PDF|PPT
12:00-01:00 LUNCH
01:00-02:30 Parallel VSIPL++ Vote [All]
Discussion of spec changes since last meeting and
Specification Walkthrough items (Bergmann CODESOURCERY)
02:30-03:00 BREAK
03:00-05:00 Discussion of Various approaches for task parallelism
a. Lazy Evaluation – Mark Mitchell and Eddie Rutledge PDF|PPT
b. Arguments to “=” – David Abrahams
c. “Magic Input Block/IO Block” – Jules Bergmann
and Mark Mitchell
d. Setup Assign – David Abrahams
e. PVL Style Conduits – Glenn Schrader
f. Multiple Binaries – Glenn Schrader
g. Low Level API (e.g. start, finish, poll, etc.)
– Miriam Leeser PDF|PPT


Thursday, Apr 6
(APPLIED RESEARCH WORKING GROUP & VSIPL FORUM)
09:00-09:30 BREAKFAST
09:30-10:30 FPGA API Update (Leeser, Vai) PDF|PPT
10:30-11:30 VSIPL Image processing (Guna Seetharaman AFIT)PPT|PDF
11:30-12:00 Discussion
12:00-01:00 LUNCH
(VSIPL FORUM)
01:00-03:00 Discussion and vote on VSIPL API 1.2

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LOCATION: Boston Area.

ORGANIZERS:

HPEC-SI Development Working Group Co-Chairs
Mark Richards (mark.richards@ece.gatech.edu)

HPEC-SI Prototypes Working Group Co-Chairs
Bob Bond (rbond@ll.mit.edu)
Ken Flowers (kflowers@mc.com)

HPEC-SI Advisory Board
Jeremy Kepner (kepner@ll.mit.edu)

ATTENDANCE:
Attendance is open to all U.S. Citizens. If you plan on attending (in person or telecon) please send e-mail to: ssacco@ll.mit.edu.