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HPEC-SI colleagues,
Our next HPEC-SI meeting will be Aug 2/3 at MIT Lincoln Laboratory. Below is a draft agenda. If I am missing something please let me know. If you see your name listed and can't present please let me know. If you are planning on attending please RSVP to ssacco@ll.mit.edu.
Regards. -Jeremy
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HPEC-SI Meeting, August 2 – 3 2006
Minutes
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MEETING GOALS
(1) Review Parallel VSIPL++ Examples
(2) Conduit and Tasks Conceptual Document
(3) FPGA API update
(4) Image Processing update
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Agenda
Wednesday, Aug 2.
(DEMONSTRATION & DEVELOPMENT WORKING GROUPS)
09:00-09:30 BREAKFAST
09:30-10:00 HPEC-SI Review & HPEC Preview (Kepner)
10:00-11:00 Demo/eval status (Pancoast, Judd, Sroka, Emeny)PDF
11:00-12:00 VSIPL++ Serial and Parallel Implementation
-Parallel VSIPL++ implementation status
(Bergmann CODESOURCERY) PPT
-Parallel VSIPL++ cluster status (Campbell GTRI)PPT
-VSIPL++ user's guide status (Campbell GTRI)
-Review of any Parallel submissions
-Discussion of VSIPL implementation
of HPCS SAR Benchmark (Sroka MITRE)
12:00-01:00 LUNCH
01:00-02:30 Conduit and Tasks Conceptual document (Schrader)
02:30-03:00 BREAK
03:00-03:30 PAS on GTRI Cluster (Cain Mercury)PDF
03:30-03:45 VSIPL++ Glossary (Sacco)PDF
03:45-05:00 Parallel VSIPL++ Examples
Thursday, Aug 3.
(APPLIED RESEARCH WORKING GROUP & VSIPL FORUM)
09:00-09:30 BREAKFAST
09:30-10:30 FPGA API Update (Leeser, Vai)PPT
10:30-10:45 BREAK
11:00-11:30 VSIPL Image processing update (Guna Seetharaman AFIT, K. Palaniappan University of Missouri, Columbia)PPT
11:30-11:45 VSIPL image processing compatibility (Verari)PPT
11:45-12:00 Discussion
12:00-12:30 LUNCH
12:30-2:00 VSIPL PDF
ATTENDANCE:
Attendance is open to all U.S. Citizens. If you plan on attending (in person or telecon) please send e-mail to: ssacco@ll.mit.edu.
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