TITLE: HPEC-SI Development Working Group (Nov 1)
HPEC-SI Prototypes Working Group (Nov 2)
TOPIC: VSIPL++ Designs
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Design of parallel vectors, matrices and blocks
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Parallel VSIPL Prototyping Plan
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Examination of different Task/Pipeline parallel approaches
DATE: Thursday Nov 1 2001 (all day)
Friday Nov 2 2001 (morning)
LOCATION: MIT Lincoln Laboratory, Lexington, MA
Room S2-616
For directions
see http://www.ll.mit.edu/about/visitor.html
ORGANIZERS:
HPEC-SI Development Working Group Co-Chairs
Mark Richards (mark.richards@gtri.gatech.edu)
James Lebak (jlebak@ll.mit.edu)
HPEC-SI Prototypes Working Group Co-Chairs
Bob Bond (rbond@ll.mit.edu)
Henk Spaanenburg (Mercury)
HPEC-SI Advisory Board
Jeremy Kepner (kepner@ll.mit.edu)
ATTENDANCE:
Attendance is open to all U.S. Citizens. If you plan on attending
please send e-mail to: kepner@ll.mit.edu
CLEARANCE:
This meeting is UNCLASSIFIED.
However, if you have a clearance we would appreciate having
you send it to:
MIT Lincoln Laboratory
244 Wood Street
Lexington, MA 02420
Attn: Roslyn Wesley
(781) 981-2377--Phone
(781) 981-5588--Fax
Workshop
Notes
Presentations
Thursday, Nov 1, 2001 (Development Working Group)
Friday, Nov 2, 2001 (Prototypes Working Group)
Virutalization (Henk Spaanenburg - Mercury Computer)
- MS PPT
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